MiLSD Brings Line Detection to Low-Cost Microcontrollers
A new micro-detector enables high-accuracy line segment detection within a sub-megabyte memory budget for edge AI.
MiLSD enables precise line segment detection on low-cost microcontrollers by compressing the model to fit within a one-megabyte activation budget. This capability is critical for visual SLAM, 3D reconstruction, and industrial inspection, where hardware constraints typically prevent the use of deep learning models that require several megabytes of memory.
https://arxiv.org/abs/2607.06600
The research introduces a compact fully-convolutional backbone using a specific center-with-length-and-angle formulation. This approach proves most effective for small model sizes, allowing the system to scale performance based on available memory. By utilizing sub-pixel decoding and a lightweight verifier, MiLSD increased sAP10 on the ShanghaiTech Wireframe benchmark from 10.6 to 24.1 while staying under the 1 MB limit.
Hardware optimization reveals a strict floor for quantization. While 8-bit quantization maintains full-precision performance, 4-bit quantization causes significant degradation in angle regression that quantization-aware training cannot fully recover.
This mapping of the accuracy-memory trade-off shifts the focus from GPU-scale parsing to the practical limits of embedded vision. It establishes a blueprint for deploying sophisticated geometric computer vision on the most resource-constrained devices.